"Building reliable, testable infrastructure for event-driven embedded systems, from the OS core up to the test framework that verifies it."
I am a 4rd-year Computer Engineering student at VNUHCM-UIT (GPA: 8.55/10). I build embedded software and the tooling around it: the μEDP event-driven core, its code-generation and test framework PLTF, and the reusable C library lib-sysst8. My approach is test-by-design: one configuration source generates the code, every feature is reviewed in writing before it is implemented, and every change is versioned and traceable.
- Current Mission: Evolving μEDP (Event-Driven Framework) into μE-OS (Event-Driven OS), a full-scale embedded OS with features inspired by the Linux kernel.
- Strategic Focus: Unidirectional configuration pipelines, test automation for embedded targets, and documentation-driven development.
- Languages: Vietnamese (Native), English (IELTS 7.0 - Proficient).
| System Design & OS | Hardware & Protocols | Infrastructure & Automation | Validation & Quality |
|---|---|---|---|
| Active Object Model, HSMC (TSM/FSM), Priority Escalation, S-LnF APE, Memory Pooling, Pub/Sub design, FreeRTOS / QP-C comparison | STM32F103 / STM32H723 (UART, SPI, I2S, DMA), ESP32-S3 (PAL target), Linux PAL for virtual targets | Kconfig, Jinja2, Docker Compose, CMake, Python-based generators, Git (feature/docs branches, release tags) | PLTF (test framework), μE-LS (YAML DSL), TSD/TLC (in design), Positive/negative test sets, Virtual-target BST, Doxygen-style docs, gcc -Wall -Wextra |
A single-stack run-to-completion framework designed for portable, deterministic embedded systems.
- Architecture & Design: Built a 3-layer decoupled architecture (App-Core-PAL). Implemented a Unidirectional Configuration Pipeline (
Kconfig->.config-> generated declarations and code) so that all generated artifacts derive from a single configuration source. - Memory & Data Guard: Designed Deterministic Memory Pooling (DMP) and Global Data Area (GDA) with Zero-Copy Reference Passing (D2MP), reducing memory fragmentation and keeping application logic free of exposed shared-data traces.
- Scheduling & Priority: Implemented a bitmask-based scheduler with Atomic Priority Escalation (APE) and Safe LIFO-nested FIFO (S-LnF) for urgent-message handling.
- Background Services: Developed Out-Context Execution (OCE) with a modifiable execution chain (mexecjn), so non-critical services (log dumping, cleanup) run without disturbing the main control logic.
- Reliability: Implemented Fatal Code Return (FCR) error handling with severity levels and actions (released in v1.1.5).
- Platform Bring-up: Ported the core to STM32F103 and STM32H723 and ran the internal logger integration test on a physical kit (LXP723ZGP1V2).
Staged, template-driven code generation and test tooling for μEDP.
- Staged Pipeline: Separated configuration (
menuconfig->.config) from code generation. Seven Jinja2 generators render complete files from one parsed.config, replacing the earlier marker-based string patching. - Logic Specification: Designed μE-LS, a YAML DSL for state machines and task behavior. Validated with Pydantic models and a structural / context-type validator, then rendered to
app.c. A Unified Symbol Table (UST) cross-checks symbols against the configuration. - Containerized Environment: Docker Compose setup with a UID/GID-mapped user, GCC/CMake/GDB, ESP-IDF v5.1, and pytest in the image.
- Test Verification: Behavior is verified with a Basic Software Test (BST) on a virtual Linux target. Physical-target BST on STM32 and ESP32 is the next step.
- In Design: TSD (Test Scenario Descriptor) and TLC (Test Level Coverage). Design reviews are written, and implementation is planned for v1.1.7–1.1.8. Runtime coverage and the ut/ct/st/it levels are not yet implemented.
A lightweight sibling of μEDP for plain C projects that need state machines and fault reporting without the full framework.
- Fatal Code Return (FCR): Error reporting with severity levels and configurable actions.
- Finite State Machine: NTRY / EXIT / STAY signals with
go_next()/go_back()transitions, dispatched through a message queue in the main loop. - Hardware Timer Wrapper: Init, start, stop, and IRQ handling (added in v1.3).
- Delivery: CMake build (3.16+), tagged releases v1.0–v1.3, and integration documentation (
README.md,document.md). - Design Constraints: Platform stubs must be adapted per target, and global state requires care in multi-threaded use. Both are documented in the README.
- μEDP: Tagged releases through v1.1.6 (with bugfix builds bf1–bf3). Pub/Sub engine design is in progress. TSD/TLC is planned for v1.1.7–1.1.8, with full PLTF/TLC integration as the quality gate for v1.2.0.
- μE-OS: Secure Signal Injection (v1.2.2), Tickless Idle (v1.2.3), Task-as-File Control Interface (v1.3.0), Component Manager (v1.3.1), Task Counter (v1.3.2), Safe Heap Allocation (v1.4.0), and more. See ueos-roadmap.md.
- Version Control: Git with conventional commit messages (
feat,fix,docs,refactor, scoped by module). Feature and docs branches are merged in numbered PR sets. Releases are tagged (μEDP v1.0.0–v1.1.6-bf3; lib-sysst8 v1.0–v1.3). - Project Management: Versioned to-do list with task IDs and epics (e.g.,
PLTF-001,TEST-002,DOCS-006). Each feature has a written design review before implementation. - Test Methodology: Positive and negative test sets for PSE, GDP and FCR. Test-object YAML files per target (
vir-*/phy-*). Test case reviews are documented. Physical-target BST is planned. - Architecture Documentation: Architecture description practice from ISO/IEC/IEEE 42010:2022 applied to μEDP (entities of interest, architecture description language, model kinds, viewpoints).
- Coding & Documentation: Doxygen-style comments, naming-convention and style guides, and
gcc -Wall -Wextrachecks. - Next Focus: MISRA-C and ISO 26262 are areas I am studying. They are not yet applied in these repositories.
