[TechnoPorg]

This PR adds +relax to the default target features for all RISC-V targets to enable emission of linker relaxations by LLVM. It does not enable "global pointer" relaxations; see #163890 for more context and discussion on how those relaxations work. relax is then marked as an internal-only target feature so that it can't be modified with -Ctarget-feature=±relax or used with #[cfg(target_feature = "relax")], #[target_feature = "relax"], none of which make sense.

When building wild for riscv64gc-unknown-linux-gnu, it reduces binary size by 1.2%. When building my work project for riscv32i-unknown-none-elf, it reduces binary size by 1.9%, or by 2.1% if global pointer relaxations are enabled with --relax-gp.

This is an alternative to #163890 which will supersede that one if merged.
cc @RalfJung, @romancardenas, @bjorn3 as participants on the previous thread.

r? compiler

[rustbot]

Target features are being changed; ensure all ABI effects are being accounted for

cc @RalfJung

These commits modify compiler targets.
(See the Target Tier Policy.)

[TechnoPorg]

I'm not sure whether it would make sense to enable this in global_llvm_features instead of touching every individual RISC-V target. The argument I had for doing it this way is that if someone desperately needs to turn off linker relaxation, they can write a custom target spec without it.

[RalfJung]

I would suggest adding a check in compiler/rustc_target/src/spec/consistency.rs that required "relax" to be present in all our riscv targets. (That check can distinguish between JSON targets and built-in targets.)

[RalfJung]

Pinging riscv target maintainers.
@almindor
@dkhayes117
@romancardenas
@MabezDev
@jessebraham
@rmsyn
@hegza
@sanchuanhehe
@flaub @jbruestle
@xobs
@kito-cheng @michaelmaitland @robin-randhawa-sifive @topperc
@Amanieu @kraj
@ZhongyaoChen @CaiWeiran

[Amanieu]

The relax feature mainly existed to support linkers which at the time didn't support linker relaxation. But these days I believe this is supported by all major linkers, so there's no point in disabling this any more.

[sanchuanhehe]

Typo: Missing comma in RISC-V target features

File: compiler/rustc_target/src/spec/targets/riscv64gc_unknown_redox.rs⁠

There seems to be a missing comma in the feature string:

base.features = "+m,+a,+f,+d,+c+relax".into();

It should be:

base.features = "+m,+a,+f,+d,+c,+relax".into();

Otherwise, +c+relax will be parsed as a single invalid feature instead of two separate features.

[rustbot]

Target consistency checks are being changed

cc @RalfJung

[rustbot]

This PR was rebased onto a different main commit. Here's a range-diff highlighting what actually changed.

Rebasing is a normal part of keeping PRs up to date, so no action is needed—this note is just to help reviewers.

[romancardenas]

LGTM

View changes since this review

[TechnoPorg]

@rustbot reroll